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An I/O processor (8051) is designed for processing I/O events, like receiving IR signal from remote controller, taking care of power on or off requests from RTC, or other hardware events of external peripherals even when power of main system is off. The goal of the document is to illustrate how to enable, program and use I/O processor (8051). Please follow the following steps to setup and use I/O processor in SP7021.

1. Enable Sunplus I/O processor (IOP) driver

Run make menuconfig in kernel folderkconfig in project top directory. After Linux Kernel Configuration menu pops up, please use arrow keys to move cursor to go to sub menu “Device Drivers”, then go to its sub menu “Misc devices”, and then go to next sub menu “IOP support”. Enable “Sunplus IOP support”. Refer to screenshot of sub menu “IOP support” below:

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where pinmux_iop-pins is sub node of node pinctl@9c000100. Two pins G_MX17 (GPIO_P2_1) and G_MX18 (GPIO_P2_2) are set as pins of I/O processor. Note that the two pins can only be access in normal operation mode because that power of normal GPIO pins (G_MX0/P0_0 ~ G_MX87/P10_7) is turned off during standby mode. In standby mode, only IV_MX0 ~ IV_MX6 can be accessed. No need to set pins in device-tree for standby mode operation.

Please note that to comply with Linux rules, after version 5.10.59, 4 property-names of pin node of SP7021 are changed as shown in table below:

5.4.35

5.10.59

sppctl,function

function

sppctl,groups

groups

sppctl,pins

sunplus,pins

sppctl,zero_func

sunplus,zerofunc

4. Install C compiler or assembler for I/O processor

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Refer to mapping table of GPIO to IV_MX pins:

AO domain pins

S0 mode

S1 mode

IV_MX[0]

GPIO[92]

GPIO[0]

IV_MX[1]

GPIO[93]

GPIO[1]

IV_MX[3]

GPIO[94]

GPIO[3]

IV_MX[4]

GPIO[95]

GPIO[4]

IV_MX[5]

GPIO[96]

GPIO[5]

IV_MX[6]

GPIO[97]

GPIO[6]

IV_MX[2]

GPIO[98]

GPIO[2]

In S3 (ultra low power mode), only SRAM and Wake-up circuitry are powered. This is the minimum power-consumption state. In this state, IOP is powered off, but ‘standby mode’ code of IOP is preserved in SRAM. Wake-up circuitry will detect the state of WAKE_IN (IV_MX1) pin continuously. A LOW state in WAKE_IN pin will switch power state of SP7021 to S0. The power consumption is about 1.8 mW in this mode.

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