5.7 Implementation of System Software Platform for FPGA Experiment Project

After the system hardware platform is ready, start the SP7021 IDE integrated development environment and start the IP verification of the combination of SOC software and hardware;

5.7.1 New project

To create new project, please refer to the previous chapters, as follows: In the IDE environment, as shown below, select the sp7021 project name, click the right mouse button and select Copy in the pop-up menu

Open

Next, select the sp7021 project name again;

Open

Click the right mouse button and select Paste in the pop-up menu, the following picture appears

Fill in the led in the Project name box to complete the establishment of the led project name and directory, as shown below:

5.7.2 Program code preparation

Next, you need to copy all the files and folders under the installation directory \SP7021\example\ led_7segment_ctl to the led project directory built above (the path is: installation directory \SP7021\ workspace\led\), the file with the same name is selected to be overwritten, so the the main.c; fpgaint.c; fpgaint.h needed by the IP experiment are placed in the following paths:

1） In the install directory \SP7021\workspace\led\ main.c

2） In the install directory \SP7021\workspace\led\testapi\util\led.c

3） In the install directory \SP7021\workspace\led\include\util\led.h

main.c

int main(void)

{

    printf("Build @%s, %s\n", __DATE__, __TIME__);

    hw_init();

    sys_init();

    fbio_init();

    led_ctl(); 

    disp_hdmi_init ();

timer_test_init (); /*interrupt test api */   

led_interrupt_init (); /*interrupt test api */

    sp_interrupt_setup(); /* interrupt manager module init */

    while(1);

}

Compared with the HDMI display and timer interrupt control experiment, two functions, fbio_init () and led_ctl (), are added to complete the configuration and initialization of FBIO and digital control IP, as explained below

void fbio_init()

{

        MOON1_REG->sft_cfg[1] = (0x1<<12) | (0x1<<(12+16));//enable FBIO pinmux

        MOON0_REG->reset[9] = (0x1<<6) | (0x1<<(6+16));//reset FBIO

        MOON0_REG->clken[9] = (0x3<<(5+16)) | (0x3<<5);//enable FBIO clk

        MOON0_REG->gclken[9] = (0x3<<(5+16));//disable FBIO Gclk

        FBIO_CTL_REG->io_ctrl = 0x3;//enable 16bit DDR mode

        FBIO_CTL_REG->io_tpctl = 0x10f0f; //set tx clock delay

        FBIO_CTL_REG->io_rpctl = 0x10f0f;//set rx clock delay

        MOON0_REG->reset[9] = (0x1<<(6+16));//release FBIO reset

}

Call the system register ( path： SP7021\workspace\led\include\regmap_q628.h , which defines the relevant registers) to implement the FBIO module configuration function, thereby establishing the transmission channel of the main chip SP7021 and FPGA;

void led_ctl()

{

    led_reg->EX_BUFFER=0x8888;

    led_reg->EX_TO=0xFFFFFF;

    led_reg->EX_CON=0xf;

}

Realize the configuration and initialization operation of user digital control IP, as follows:

led_reg->EX_BUFFER=0x8888;

The initial display of the digital tube is set to four “8”

led_reg->EX_TO=0xFFFFFF;

Timer fixed time setting

led_reg->EX_CON=0xf;

Enable Digital tube display and timer interrupt

led.c

#include "common_all.h"

#include "cache.h"

#include "sp_interrupt.h"

#define FPGA_EXT0_INT  (29)

#define FPGA_EXT1_INT  (30)

static unsigned int g_repeat_cnt = 0;

void fpga_ext0_interrupt_control_mask(int enable)

void fpga_ext1_interrupt_control_mask(int enable)

static void fpga_ext0_isr_cfg()

static void fpga_ext1_isr_cfg()

void fpga_ext0_callback(void)

void fpga_ext1_callback(void)

void led_interrupt_init()

void fpga_ext1_test_init()

Compared with timer.c of timer interrupt control experiment, the structure is similar, the difference is that the interrupt number and interrupt handler are different, as explained below

void fpga_ext0_callback(void)

{

    printf("@LED DISPLSY VALUE[%x] \n", ++g_repeat_cnt);

    led_reg->EX_BUFFER = g_repeat_cnt;

}

The role of this interrupt handler: When the digital tube control IP generates an interrupt, change the content displayed by the digital tube

led.h

#ifndef __FPGAINT_H__

#define __FPGAINT_H__

#define  FBIO_BASE_ADDR 0x70000000

typedef struct led_reg_s { // Define Digital tube IP registers

    unsigned long EX_CON;

    unsigned long EX_TO;

    unsigned  long EX_BUFFER;

    unsigned  long EX_STATE;

} led_reg_t;

extern led_reg_t *led_reg;

void led_interrupt_init();

void fpga_ext1_test_init();

#endif // __FPGAINT_H__

Defined the IP related registers of digital tube control, as commented in red above

5.7.2 Program code running

After compile in the Plus1 IDE environment, download to the platform and see the following information in the terminal window

At the same time, the display changes of 4 digital tubes can be observed on the Plus1 demo board

5.7.3 Linux OS programing guide

For linux OS programing guide ,please refer to the following documentation: